Discussion of the PSoC Designer integrated development environment for PSoC1 devices.

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Postby cJo » Fri Jun 21, 2013 12:02 pm


I use a master and a slave.

I want to obtain samples from a sensor(slave) and then convert it to digital from analog. Then read by master via I2C.

At this point, Is Timer8 module essential in order to use SAR6 user module? If conversion time = 6/(analog column clock/4), then what is the relationship between sample rate(fs) of timer8 and conversion time? Coz fs= clock frequency of timer8/(1+period)
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Re: SAR6

Postby bobmarlowe » Fri Jun 21, 2013 12:22 pm

The SAR of course needs a clock to work and divides it internally by 4 to create the neccessary stages to convert each bit.
You do not need a timer-module you may use VC1, VC2 or VC3 with the appropiate prescaling factors.

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Re: SAR6

Postby danadak » Mon Jun 24, 2013 2:56 am

Keep in mind VC1/2/3 are HW clock dividers, that can be used to
clock various digital blocks. If you design their properties carefully
you can cover many needs in the design, w/o having to use timers/
counters to generate clocks for some specific block.

So in short spend some time looking at all clocking requirements and
focus on their choice/dividers to see how many clock requirements
you can cover with VC1/2/3.

This might help -

Also keep in mind you can dynamically alter VC1/2/3 divider ratios,
so you can use the same clock on multiple needs. Consult TRM for
clock switching guidlines.

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