Interrupt on Comparator 1 Column; BMC protocol

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Interrupt on Comparator 1 Column; BMC protocol

Postby Mr_E » Tue Jan 07, 2014 8:41 am

Hi guys,

I am using a comparator to digitize an incoming signal. I have connected the comparator output "CompBus" to "ComparatorBus_1". What I can't seem to figure out is how to get an interrupt on the comparator 1 column.

Background: if this was a standard signal I could just feed the comparator 1 column to a UART or SPI port. This protocol is biphase-mark coding (see here: http://en.wikipedia.org/wiki/Differenti ... r_encoding, half way down the page). It requires me to differentiate bit widths to determine 1's or 0's.

If any of you have decoded BMC before, I would love your input. My current approach is to get an interrupt on each signal edge change, reset a counter, and measure how long until the next edge. I will use the bit width to determine 1/0 and stuff into a bitstack for later decoding.

More info: BMC is used in the linear time code (LTC) format used in SMPTE timecode generators.

Thanks,
Mr_E
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby bobmarlowe » Tue Jan 07, 2014 12:34 pm

Yes, getting the interrupt is not that easy. The comparator busses are also named "Analog Column 0 to 4" .

Write an interrupt handler, use the #pragma - directive. Edit the file boot.tpl (from this the file boot.asm is generated) and place an LJMP - instruction into the noted places to
"_HandlerName" (mark the needed underscore).

A totally different (but working) approach could be to use the incoming signal as capture for a timer module counting a high-enough frequency. At a capture you can get interrupted, halt the timer, read out the captured value and restart the timer again.
Alternatively you can use a counter and gate the clock with the enable pin, so counting the high-time of a signal.Get interrupted when counter reaches a treshold.

Happy coding
Bob
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby Mr_E » Tue Jan 07, 2014 1:03 pm

Bob,

Thanks for the reply. I can see the analog column interrupts in boot.asm. I tried setting break points on the default RETI entries and didn't get any, so I figured there is some interrupt mask I'm missing?

I have written custom interrupt handlers before, no problem there.

At the moment I have resigned myself to using the capture interrupt from a timer - great minds think alike!

Point #3 - I though about using a terminal count interrupt on a counter, but I need to be able to deal with varying baud rates.

I wish that was a chip out there that made decoding BMC easier. It seems there were several circa 2006, but they are all obsolete, or the companies don't even acknowledge that they existed. There are S/PDIF decoder chips (S/PDIF uses BMC modulation), but these chips also expect the higher level S/PDIF protocol, not the LTC format I'm receiving.

Thanks again.
-Mr_E(ngineer)
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby bobmarlowe » Tue Jan 07, 2014 2:34 pm

Look here for interrupt and interrupt mask.

Bob
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby Mr_E » Tue Jan 07, 2014 2:59 pm

Thanks Bob, that is truly helpful. The answer is:
Code: Select all
M8C_EnableIntMask INT_MSK0, INT_MSK0_ACOLUMN_0
.

It only triggers on the rising edge of the signal though, so I will stick with the Timer/Compare interrupt. On that one I can flip the capture polarity so I can get each edge :)
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby graaja » Wed Jan 08, 2014 12:38 am

You can also change the polarity of comparator bus interrupt by modifying the LUT. Every comparator bus has a hardware LUT that can perform 16 logical functions with the comparator bus signal and an adjacent comparator bus signal. If you set the LUT to "A", this will generate a rising edge interrupt from the comparator bus. Setting the LUT to "~A" will generate a negative edge interrupt. You can change the configuration of the LUT by writing to the ALT_CR0 or the ALT_CR1 registers. ALT_CR0 controls comparator buses 0 and 1, and ALT_CR1 controls comparator buses 2 and 3.

Hope this helps.
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Re: Interrupt on Comparator 1 Column; BMC protocol

Postby Mr_E » Wed Jan 08, 2014 6:19 am

Thanks graaja. That is helpful. Now I have two ways to attack the problem :)
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