SPIS IRQ is not triggered

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SPIS IRQ is not triggered

Postby BPI » Sun Jan 09, 2011 4:06 am

Hello,

I have spent a couple of hours trying to use the IRQ of the SPIS to trigger ISR. With no success - So I think, there is something worng with the documentation. Reading the SPI-Complete-Flag shows me there is a valid byte received. By polling this bit as discribed in the Datasheet of SPIS it works well. But I think for a Slave polling is not the propper method. It would rather like to do this via IRQ. I did it right the way discribed in the documentation of the C Image Craft compiler, the Datasheets, technical refernce manual and some additional posts of Cypress Forum for implementing Interrupts but still do not have any success with this. Here is my source code. I left some lines as comments in there to show what I also have tried without having any success - also trying different orders of switching on interrupts and SPIS. If an Interrupt would be received and pending, the LED should lit constantly, but it does not. I have implementet it in an empty project with nothing but SPIS in it. I also triggerd the IRS via Software and it works well. It seems that the enabling of the hardware IRQ to trigger Software does not work.

USED: PSOC DESIIGNER 5.0, Image Craft
DEVICE: CY8C21434-24LFXI

////////////////// boot asm:
org 28h ;PSoC Block DCB02 Interrupt Vector
ljmp _SPIS_ISR
reti

////////////////// main c-file:
#pragma interrupt_handler SPIS_ISR

void SPIS_ISR(void){
//#pragma nomac
LED_ON();
//INT_CLR1 &= 0xFB;
return;
}

void main(void)
{
LED_OFF();

M8C_EnableGInt;
Init_SPIS_Communication();

while(1){
}
}


////////////////// (included from a different file:)
void Init_SPIS_Communication(void){


//INT_MSK0 = 0;
//INT_MSK1 = 0;
//INT_MSK2 = 0;
//INT_MSK3 = 0;
//INT_MSK3 &= 0x7F; //Clear ENTSWIT >> enable IRQ-Clearing
//INT_MSK3 |= 0x80; //Set ENTSWIT >> enable IRQ by sW
//INT_MSK1 = 0x04; //Enable IRQ (posted >> pending)
//INT_CLR1 &= 0xFB; //Clear Interupt
//INT_CLR1 &= 0xFB;

SPIS_EnableInt();
//INT_CLR1 &= 0xFB;
//INT_CLR1 &= 0xFB;
SPIS_Start(SPIS_SPIS_MSB_FIRST |SPIS_SPIS_MODE_0);
//INT_CLR1 &= 0xFB;

}

So far.. I keep polling...

Regards,

BPI
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Re: SPIS IRQ is not triggered

Postby bobmarlowe » Thu Oct 06, 2011 2:09 am

Hi,
I just stumbled over this rather old request, but it came to my mind that interrrupts for the SPIS are only generated for TX ie. transmitted bytes and NOT for received data.

Have fun
Bob
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Re: SPIS IRQ is not triggered

Postby slandrum » Thu Oct 06, 2011 6:54 am

That would be because bytes are always transmitted and received at the same time. It would be redundant to trigger both Tx and Rx interrupts.
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