SSI interface

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SSI interface

Postby Turtle » Mon Sep 30, 2013 11:49 pm

I need to read out a sensor with a SSI interface that delivers 28 bits of data.
The sensor needs 28 consecutive clocks with no gap in between. There is a minimum
clock frequency of 50 or 80kHz, I am not perfectly sure.

The PSoC SPI interface can only send up to 16 bits.

Anyone out there wo implemented a SSI interface?
Is SPI the right choice or is there another user module that can send more bits in one rush?

Regards,
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Re: SSI interface

Postby danadak » Tue Oct 01, 2013 3:58 pm

Whats the sensor part number, link to datasheet ?

If SPI does not work out you can always do one in Verilog, or use LUT and create
out of standard logic components your own solution in the UDBs.

Or edit the SPI component, creating a new addition to your library. But that complicates
API modification.

Regards, Dana.
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