Debugging the PSoC3: world's first public report and tip

[jheenanm]

I got my CY8CKIT-001 a few hours ago. From 21 available when I ordered one last week there is now one available for order from http://my.cypress.com

Old hands are going to want to know about the 'debug experience'.

As hoped for it is possible to keep a source window open and a disassembly window open at the same time. The disassembly window allows for source code to be mixed in with assembly code. Wonderful!

Break points can be set on disassembly code which has been disassembled form C code! Wonderful!

As with the PSoC1, break points can be set while code is executing! Wonderful!

The PSoC3 has one hardware watchpoint (or SRAM address access breakpoint) and eight code address hardware breakpoints. The hardware SRAM address watchpoint breaks on read, write or access as configured. Wonderful! However watching for access of a particular value at a particular SRAM address does not appear to be possible at the hardware debug level.

With such a small debugger as the Mini Prog3, does this mean the PC is going to take on more work that with a PSoC1 Ice Cube debugger? The answer is yes.

Here is a tip I discovered to reduce the PC workload considerably while executing in debug. Instead of configuring the MiniProg3 to use the SWD transfer mode as recommended in the User Guide, use the JTAG transfer mode instead.

Unlike PSoC1, PSoC3 debugging does not require special OCD version chips.

PSoC Creator as a whole is more responsive than PSoC Designer with regard to opening and closing closing projects as well as general project navigation. Wonderful!

Unlike Eclipse based IDEs and MS Visual Studio, PSoC Creator (for PSoC3 and PSoC5) and PSoC Designer (for PSoC1) do not have code completion intellisense.

Unlike PSoC Designer, there is a call stack window in PSoC Creator which will save digging through the instruction trace window. Wonderful!

For the PSoC3, the current beta version of PSoC Creator does not configure recording or disassembly of instruction trace in the 8K Trace buffer on the PSoC3.

Unlike PSoC Designer, the schematic designer of PSoC Creator is a lot more free form and allows multiple schematic pages to be electrically connected with a single page designated as the top design schematic. Components can be dragged and placed on sheets where one wants. Components can be very basic (such as simple logic) or very sophisticated (such as Full Speed USB). Looks like we are getting very sophisticated design tools for free!

John Heenan

[ericb]

Great report John. Any screen shots, pictures, sample projects to share?

Eric

[jheenanm]

Great report John. Any screen shots, pictures, sample projects to share?

Eric

Hi Eric

Thanks for your comments. I have edited the report for completeness.

There are five sample projects for the PSoC3 that can be installed.

Following are images of debugging with the Ex2_ADC_to_LCD project and of the CPU load while debugging.

Clearly the PSoC5 with its ARM Cortex-M3 core will be able to do a bit shift of a 16 bit variable (to divide by 2) with a lot fewer cycles than the PSoc3 with its 8 bit 8051 core!

CPU usage more than halves with JTAG use compared to SWD use.

John Heenan

PSoC Creator source code mixed with disassembly. Breakpoints on source and disassembly!

PSoC_Creator_Source_or_Disaasembly_breakpoints.png (63.87 KiB) Viewed 3207 times

Setting MiniProg3 Transfer mode

miniprog3_transfer_mode.png (27.43 KiB) Viewed 3206 times

CPU load with MiniProg use, both JTAG and SWD

miniprog3_pc_cpu.png (16.71 KiB) Viewed 3208 times

[jheenanm]

Clearly the PSoC5 with its ARM Cortex-M3 core will be able to do a bit shift of a 16 bit variable (to divide by 2) with a lot fewer cycles than the PSoc3 with its 8 bit 8051 core!

Maybe not under some circumstances! Other than for general purpose registers the ARM Cortex will always have additional pipelined load and store instructions to get access to memory across a bus which may introduce delays at high speeds. The 8051 core can operate on RAM internal to its core!

In Ex2_ADC_to_LCD I changed

uint16 voltageRawCount;
to
data uint16 voltageRawCount;

in order to place voltageRawCount in internal 8051 RAM instead of 8051 XRAM

and got in disassembly:

Code: Select all

  81:          voltageRawCount /= 2;
0x00000EC8 mov a, 0x0f
0x00000ECA clr c
0x00000ECB rrc a
0x00000ECC mov 0x0f, a
0x00000ECE mov a, 0x10
0x00000ED0 rrc a
0x00000ED1 mov 0x10, a

instead of

Code: Select all

  81:          voltageRawCount /= 2;
0x00000C1B mov dptr, #26a
0x00000C1E movx a, @dptr
0x00000C1F mov r6, a
0x00000C20 inc dptr
0x00000C21 movx a, @dptr
0x00000C22 mov r7, a
0x00000C23 mov a, r6
0x00000C24 clr c
0x00000C25 rrc a
0x00000C26 mov r6, a
0x00000C27 mov a, r7
0x00000C28 rrc a
0x00000C29 mov r7, a
0x00000C2A mov dptr, #26a
0x00000C2D mov a, r6
0x00000C2E movx @dptr, a
0x00000C2F inc dptr
0x00000C30 mov a, r7
0x00000C31 movx @dptr, a


John Heenan

[mgs]

jheenanm wrote:
CPU usage more than halves with JTAG use compared to SWD use

That's not supposed to happen. We've reproduced it in-house and a fix should show up in a product update soon.

-- mgs (Cypress).

[Sergey]

Hi there!

I'm yet to buy the board, but i think this will happen very soon.
But before that, maybe someone could answer me a question about the C compiler. From what I read in the User Manual, it's downloaded during the installation of the PSoC Creator and then some sort of registration needed.
Is "registration" just another word for "buying a license" or it is just a formal process because they guys who make the compiler want to know who uses it?

[mgs]

It is the latter - you do not need to buy the compiler (we already paid for it because we want you to be happy!!). The compiler is the CA51 from Keil (ARM Ltd). It is included in the distribution of PSoC Creator.

We wanted to include a compiler in the product so that you can download and start working immediately. We also did not want any time-wasting code-limited versions that almost let you try something... but not quite. So we have an agreement with Keil to include the compiler free-of-charge to you and with no code size limitations. The only difference between this and the compiler you could buy from Keil is that our's is limited to level 5 optimization (and PSoC devices). If you have a large application or need the fastest speed optimization then you can buy the compiler and it will work straight away (if you're serious about PSoC development I strongly recommend doing that).

So, the registration is there so that Keil can track installations and, at your option, send you some email updates occasionally. You have 30 days to register it or it reverts to a code-limited evaluation. You also need to re-register annually but there is no fee. Note that when you install it asks you to fill out a dialog with your email and stuff but that is not registering - you can do the actual registration and get the license key from the Creator Help menu.

-- mgs

[ravo]

Hello

I've just also started evaluation of PSoC3. And it looks cool. I have one answer at this point - Is it possible to download from Keil an upgrade - in PSoC creator I've got 8.16 version and new version is 8.18 ? Or must use the version included in PSoC Creator installation, or i would prefer to include Keil updates to Web updater application.

Regards

Radim

[gtec]

It is the latter - you do not need to buy the compiler (we already paid for it because we want you to be happy!!). The compiler is the CA51 from Keil (ARM Ltd). It is included in the distribution of PSoC Creator.

We wanted to include a compiler in the product so that you can download and start working immediately. We also did not want any time-wasting code-limited versions that almost let you try something... but not quite. So we have an agreement with Keil to include the compiler free-of-charge to you and with no code size limitations. The only difference between this and the compiler you could buy from Keil is that our's is limited to level 5 optimization (and PSoC devices). If you have a large application or need the fastest speed optimization then you can buy the compiler and it will work straight away (if you're serious about PSoC development I strongly recommend doing that).

So, the registration is there so that Keil can track installations and, at your option, send you some email updates occasionally. You have 30 days to register it or it reverts to a code-limited evaluation. You also need to re-register annually but there is no fee. Note that when you install it asks you to fill out a dialog with your email and stuff but that is not registering - you can do the actual registration and get the license key from the Creator Help menu.

-- mgs

Hi! Sorry but waths is the minning of " Limited to level 5 optimization"? I'm new in the world of PSoC. Thank you

[mgs]

Hello!

The Keil compiler that ships with our product is limited in the optimizations it can perform. There are nine levels of increasingly-aggressive optimization and our version is limited to five. This means that it generates somewhat slower code and greater code size. If this is a problem in your design you can purchase the standard compiler from ARM Ltd. and get access to the better optimizations. In our testing we do see a significant improvement, particularly in code size efficiency.

-- mgs.

[jmg]

jheenanm wrote:
CPU usage more than halves with JTAG use compared to SWD use

That's not supposed to happen. We've reproduced it in-house and a fix should show up in a product update soon.
-- mgs (Cypress).

Interesting exchange.
When this is fixed, what about link-speed limits on screen update speeds ?
Should either of JTAG or SWD give faster stepping, or are the debug link data rates essentially similar ?

[mgs]

You should not be able to notice the difference. The tradeoff is pins (4 or 5 for JTAG and 2 for SWD) versus access (JTAG allows debugging across scan chains) but not performance.

-- mgs

[lkml]

Hello!

The Keil compiler that ships with our product is limited in the optimizations it can perform. There are nine levels of increasingly-aggressive optimization and our version is limited to five. This means that it generates somewhat slower code and greater code size. If this is a problem in your design you can purchase the standard compiler from ARM Ltd. and get access to the better optimizations. In our testing we do see a significant improvement, particularly in code size efficiency.

-- mgs.

We are using the PSOC3 in a new project but is going to run out of ROM space. What kind of reduction in code size comparing to the free compiler provided?

Thanks

[mgs]

Hello!

It is never easy to answer a question like that. it depends a lot on the one thing we do not control - your code! All I can really say is that we have seen significant improvements - 10% and higher (much higher in some cases - like 30%). If a purchase is hard to justify without more information you could evaluate the Keil compiler by downloading a version from their site. It will have a code limitation of 4kB (I think) but will allow all optimizations. You will not be able to build all of your code but should be able to take a subset and see how effective the optimizations are.

-- mgs