PSoC series 3 and 5: disappointment

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PSoC series 3 and 5: disappointment

Postby kiiid on Thu Jun 07, 2012 6:50 pm

I don't know am I the only one who feels this way, but after some time spent with the new PSoCs, I really feel disappointed in them. Here is why:

1. Based on crooked cores.
Probably lot of people would start arguing with me about the great legacy of 8051 and good architecture of Cortex. While I don't agree with either, this is not a dispute and I am just explaining my reasons without any ambitions for a dispute.

2. No low-pin or human-friendly packages.
PSoC is great in space constrained applications where some hardware can be "put" into the chip. With the packages, currently offered for these, that concept goes void. For the big ones - QFN and SSOP are not amongst the first choices for me when it comes to preparing a hand-made prototype. I would much rather go with SOIC or even DIP.

3. Going back to hard-wired peripherals.
There isn't really anything to comment here. Such chips are manufactured by 100+ other companies, so where is the "wow" factor here, I don't know.

4. PSoC Creator "too good".
While it offers great flexibility and a million options for configuring the modules, I am starting to ask my self hasn't that gone too far? The learning curve is much steeper in comparison with the PD. I kinda liked the PSoC Designer much more.

5. High cost.
What is the point of having a great chip, if I can't consider it in 90% of the cases due to its cost? Saving a few external analogue components is not really something that would make my decision easier as I can place them as discrete components on the board and still save by using a microcontroller from another manufacturer. Maybe I am missing the whole picture here, but for me this model doesn't work well.

6. Bad documentation.
Is there any newstarter here, that hasn't been shoked by the datasheet of a PSoC? It happened to me, It has happened to other people I know. I even know about engineers, completely ignoring the PSoC option, simply because they have not been able to understand the whole concept by reading the datasheet. I think Cypress would need to work a bit more in that direction.


Well, probably there are even more reasons for me, but these are enough as a start (or rather end of my play with the existing 3/5 family)
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Re: PSoC series 3 and 5: disappointment

Postby bobmarlowe on Thu Jun 07, 2012 11:32 pm

I feel a bit sorry for you, but my way with PSoCs went completely different.
When starting with the PSoC1s I could instantly realize the power behind that concept (and there were user-friendly packages available)
But the lack of intrinsinc debug-capabilities costed me the price for an ICE-Cube.

Then I got hands on PSoC3 and 5.

Yes, I agree with you that the architecture of an 8051 is a bit (or rather a byte :mrgreen: ) out-dated but I'm damned sure, Cypress will react on that!
What do you want to do with a "user-friendly" package? Handle it? In times (now) where only the smallest solutions survive every square-inch of the board counts, every increase of integration density is a plus. Need something to get your hands on? Use a processor module, ready to go off the shelf, having sophisticated debug-capabilities. And here we are at your argument #3: The "wow" is the integration of (configurable) ANALOG components within the same chip : Sample & Hold, amplifiers, comparators, MUXes and of course the usual ADCs and DACs. Want to place that externally when there is no need for?

The concept of using pre-defined, tested and documented components comes together with parametrization (or how would you tell a comparator with WHAT the input should be compared). When you have got a very complex device it is quite explainable that the documentation is very complex as well, but the good news is: you do not need to read it all, you just have to understand the concepts. These are explained in the component-datasheets and one could ask if it is necessary to have one for an I/O-pin, but it helps when within your design-process you have to check something. The datasheet is always just one or two mause-clicks away, I really like that feature.

Pricing: My very first IC was a 7474 and I payed 2$ because that was a new invention. Wat is the price of an actual iPad compared to competition products if there are any.
Having an universal board at hand that covers most requirements, what is it worth to implement a new project, having it designed, programmed, debugged, tested and even halfway documented within a day? What is it worth to reduce the time-to-market? Cypess has sold a billion of PSoCs already, 1000,000,000 pieces, so something MUST be there about that kind of chips.

As I can see from your former posts, you are mostly concerned with PSoC1, but you did not ask a single question here concerning PSoC3 or 5. so to ask you some questions: What PSoC equipment did you use, which kits? what projects did you try to realize? What were your pitfalls, what you couldn't solve?

Bob
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Re: PSoC series 3 and 5: disappointment

Postby KennyMillar on Fri Jun 08, 2012 2:06 am

I feel your pain - but I would just like to add my comments...

1. The cores are great - they have legacy support for code, there are inumerable resources on the web for coding help and hints, they have world class tried and tested compilers and - for me this is the best thing - they are not 'soft' cores which take up a bunch of resources. For me the cores are not an issue, they are a good choice.

2. The pin count - well, I like the 100 pin devices they offer great flexibility and I regularly hand build prototypes, and even small production runs, using the QFN and SSOP packages with no problems at all. I use an SMD stencil and a paste table that costs less than €100, a small reflow oven with a controller I design myself (yes using a PSOC chip!) and easily get 100% yield with little effort. Going further down the PSoC family there are many many choices with low pin counts. If you are not doing many projects, or just hobbying then use a dev kit instead of a raw device. The First Touch kits will fit onto any breadboard or vero board.

3. If you think that hard wired peripherals are the best thing, then you have missed the whole point of PSoC. I can take a board I've design with a psoc and bunch of headers and use it in just about anything. I can have all sorts of lovelly things on just about any pin I wish - no problem, easily reconfigured, easily re-engneered if there is a design mistake - all good cost savings.

4. PSoC Creator is good, and yes it it has a learning curve - especially if you've been used to designer, but it is worth the effort. The amount of time you'll save in the long run if you are doing multiple projects will more than pay for itself.

5. I absolutely agree on price. They are over priced and it can be hard sell to the client to put a $10 chip on board.

6.Bad documentation? Really? I haven't found that at all. IYes it is different from the way Microchip and Atmel do their documentation, but the technical reference manuals and product family sheets I have found to be excellent. But cypress are always looking for feedback on documentation so if you are stuglling to get the info you need - ask them and point out why it's so hard to find! You'll be surprised how quickly they can react to positive and constructive feedback.

I'd say - stick with it, PSoC and Creator will pay you dividends in the long run. This forum is a great place to get help and advice, there are some really great people here.

Regards,
Kenny.
Spider Electronics Limited
www.spider-e.com
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Re: PSoC series 3 and 5: disappointment

Postby danadak on Fri Jun 08, 2012 2:08 am

1. Based on crooked cores.

Agree with 8051, but that was a marketing decision based on a jillion embedded designers still using 8051. Shame on us.
My curiosity is up, what is it you do not like about ARM, Cortex ? What core do you think is best ?

2. No low-pin or human-friendly packages.

Agree and disagree having done designs that only needed a few pins, and ones that needed gobs, and SOIC and QFN totally
inadequate for those. However I would like to see some low pin count packages as well.

3. Going back to hard-wired peripherals.

HW peripherals overcome code latency for starters, save valuable MIPS to be used elsewhere. In a GUI
world MIPS is everything. This is so true when many tasks in a UP operating concurrently. Nothing like
offloading stuff into HW and addressing high level “meat” of design functionality in code.

4. PSoC Creator "too good".

In late 70’s I felt processor technology not being used to get rid of truly primitive tools. I applauded first
device config gui tools when they first appeared in late 80’s, will never go back to spreading peanut butter
on a sandwich one nut at a time…..And now with Verilog, drastically better debug, great stuff. Next I want
Creator to listen to me speak into a mic a system specification, upon completion it writes code for me, I
have better things to do. Revision after that to do it by telepathy....... :mrgreen:

5. High cost.

Yes, PSOC 1 for some jobs still best bang for the buck, but semiconductor industry starts each generation
on a learning curve. So use a decision matrix to determine when 3/5 is best approach.

6. Bad documentation.

There are gaps, but clearly getting better with each release.


Regards, Dana.
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Re: PSoC series 3 and 5: disappointment

Postby kiiid on Fri Jun 08, 2012 6:20 pm

As I can see from your former posts, you are mostly concerned with PSoC1, but you did not ask a single question here concerning PSoC3 or 5. so to ask you some questions: What PSoC equipment did you use, which kits? what projects did you try to realize? What were your pitfalls, what you couldn't solve?


Didn't ask, simply because didn't have to. Most of the typical issues are already well discussed in the two main forums here and at Cypress' website. Apart from this comment, I stand behind my post unchanged.

1. As I said - no intention for a dispute. For me CM3 was a bad choice due to a number of reasons (although I admit, initially I was eagerly waiting it). 8051 doesn't even have to be commented.

2.
The pin count - well, I like the 100 pin devices they offer great flexibility and I regularly hand build prototypes, and even small production runs, using the QFN and SSOP packages with no problems at all. I use an SMD stencil and a paste table that costs less than €100, a small reflow oven with a controller I design myself (yes using a PSOC chip!) and easily get 100% yield with little effort. Going further down the PSoC family there are many many choices with low pin counts. If you are not doing many projects, or just hobbying then use a dev kit instead of a raw device. The First Touch kits will fit onto any breadboard or vero board.


Define "many". I am not a hobbyist and electronics design puts the bread on my table. But I prefer to see evey device working on my desk first, before speding more money to put it in machine manufacturing. Spending E100 or even E1000 is not a problem. The problem comes later with the difficulties with tracing and patching of those manufacturing-oriented packages such as QFN or BGA (thanks God, no such one here!)

3.
If you think that hard wired peripherals are the best thing, then you have missed the whole point of PSoC. I can take a board I've design with a psoc and bunch of headers and use it in just about anything. I can have all sorts of lovelly things on just about any pin I wish - no problem, easily reconfigured, easily re-engneered if there is a design mistake - all good cost savings.


I think you have misread my words here. I was saying exactly the opposite thing - while the PSoC1 didn't have any hardwired peripherals, 3 and 5 are going back that way, leaving their specific niche to enter into a well crowded market.

4. Yes, probably after some futher time spent with it, I will start liking it more.

5. It's Cypress' turn here.

6. By "bad" I mean not particularly clear about the overall concept. PSoC (at least 1) is not a typical microcontroller and it needs a better explanation on the very basic level. Currently the datasheets and manuals are very detailed, but lack the appeal towards designers, who are looking for a change. I was stubborn enough some time ago to spend enough time with PD4.0 then and learn the PSoC mainly by exerimenting. Other people prefer different ways.


And thanks to Dana for the comments.
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Re: PSoC series 3 and 5: disappointment

Postby moxbox on Sun Jun 10, 2012 9:34 am

Hi Kiiid,

I think sometimes people who have come from a more tradional Microprocessor background
have a more difficult time with the PSoC paradigm and seeing it's value.

1) Crooked cores?
I'm not sure what "crooked" means, but the ARM Cortex is the most used architecture
at this point and has many great features, bit set/test operations, nested,vectored interrupts, etc.
And as Kenny mentioned, the 8051 is well known, "legacy" microprocessor, and the Cypress version
is single-cycle and very competitive in performance with other offerings in this class (i.e. AVR, PIC, etc.)

2) Pin Count and packages: Cypress gets criticized on this from both ends, many customers
want even smaller packages for handheld devices, etc.
However, I do agree with you on this point, I would also like to see more "prototype" friendly
packages, like a few SOIC and/or DIP packages for easy hand assembly.

3) Hard wired peripherals:
The goes to the heart of the PSoC paradigm, they give you the flexability to choose what
peripherals you want and even the construction of the peripherals themselves.
Only an FPGA would give you this flexability otherwise - and FPGA's are much more expensive.
You can even change the mix of peripherals once your product is in the field, with a firmware
upgrade - can other microprocessor products do that? I think not...

4) PSoC Creator: Yes, it does have a bit of a learning curve, but it is worth it IMHO.
I am more productive in PSOC Creator than any other IDE I've ever used.
Often I can do something in hardware, which makes the software development much faster
(or not necessary at all), and the overall solution is better than a complex software algorithm.

5) Price : Again, if you are comparing to a simple microprocessor, it's not a fair comparison.
The PSoC3/5 has a 24 bit DSP (the Digital Filter Block), about 20-23K gates of FPGA/CPLD,
a 20 bit DelSig ADC, four 8/12 bit dacs, two SAR ADC's and more programmable analog.
I think if you take a TI DSP, a Xilinx/Altera gate array, a Linear/Analog 20 bit ADC, etc.
and add up the cost of all that, you will see that PSoC3/5 is competitive in price.
It has to be looked at as a "system on chip", not just a simple microprocessor.
If all you need is a micro and a few digital I/O pins, PSoC is generally overkill,
and there are other less expensive solutions. You wouldn't use a CNC milling
machine if all you needed was a hammer, right?

The other consideration is IP theft protection. If you use discrete components
a competitor can quickly reverse engineer your design. By using PSoC you can
"hide" the internals of your system, and make copying it much harder.
Companies that are in competitive markets see the value in this and are willing to pay for it.

BTW, did you know that the Digital Filter Block is a user programmable
24 bit MAC that runs at the system clock speed?
That is like 40Meg/60Meg multiply operations per second.
There is no PIC/AVR/MIPS/etc that can approach that kind of performance...

Also, use something like http://www.findchips.com to search for parts,
you will see that the pricing of these things can vary widely in distribution.

6) Documentation :
Fair enough comment - it has gotten much better since the initial release.
You can now select "example project" for any component, and it will download
a working example project and open it up for you. That is pretty slick.
The best way to learn PSoC is to give a local distribution or Cypress FAE
a call and have them spend an hour or two with you. Hand's on teaching is the best.

PSoC is not for everybody or for every application, but I like to use it because I can
develop ideas and products faster, and deliver a more IP theft secure solution to my
customers.

best regards,
Tom Moxon
Moxon Design
http://www.moxon.com
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Re: PSoC series 3 and 5: disappointment

Postby jmg on Mon Jun 18, 2012 2:49 am

kiiid wrote:I don't know am I the only one who feels this way, but after some time spent with the new PSoCs, I really feel disappointed in them. Here is why:

1. Based on crooked cores.

Cores matter less and less these days; using a HLL, you are insulated from the core details.

kiiid wrote:2. No low-pin or human-friendly packages.
PSoC is great in space constrained applications where some hardware can be "put" into the chip. With the packages, currently offered for these, that concept goes void. For the big ones - QFN and SSOP are not amongst the first choices for me when it comes to preparing a hand-made prototype. I would much rather go with SOIC or even DIP.


There are two issues here
DIP volumes are low, and so a break-out solution is the best prototype path.
High volume use will always be SMD, and there you will likely find die-size (see also price) limits how small these can be.

kiiid wrote:3. Going back to hard-wired peripherals.
There isn't really anything to comment here. Such chips are manufactured by 100+ other companies, so where is the "wow" factor here, I don't know.

Not sure I see a problem here ? Programmable logic is always more costly than dedicated logic, and you DO get some Programmable Logic in PSoC.

kiiid wrote:5. High cost.
What is the point of having a great chip, if I can't consider it in 90% of the cases due to its cost? Saving a few external analogue components is not really something that would make my decision easier as I can place them as discrete components on the board and still save by using a microcontroller from another manufacturer. Maybe I am missing the whole picture here, but for me this model doesn't work well.


Agreed this is a very significant stumbling block, and the hardest to change (DOCS and SW issues are easy to revise, Silicon rather less so )

I'll add another disappointment :
7. Slow Logic speed.

We have designs done using mature CPLDs and 8051, and so the PSoC3 should be a clear winner surely ?

Sadly, no, the Logic fabric is too slow to even replace very old CPLD, and much slower than 2012 CPLDs.
It is more expensive, and slower, than the mature solution we have now - and much more single sourced.

So, it makes a perfect fit for a project that needs SOME CPLD, (but not too fast), and that does not care about price.

That is very few projects.
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Re: PSoC series 3 and 5: disappointment

Postby toalan2001 on Sat Jul 07, 2012 10:23 pm

Great a thread for PSOC 3/5 grievance

1. I do not have any particular problem with the cores, choices are really limited to ARM, MIPS, and 8051. I think M0 would have been a better choice than 8051 and it is a more natural fit as PSOC 5 is based on M3. What is the alternative, take the M8 and put it on steroids? No thanks.

2. no comment, I have no issue with their package selection

3. Yes that is a total b*tch, the analog switch cap blocks seem to be very limited in terms of flexibility. I can understand the choice as more fixed function analog means higher performance and lower power consumption, but to me Cypress was about analog flexibility first and everything else second, now they are starting to change their colors and I lost my sense of familiarity

4. PSOC creator is an absolute gem, it is so much better than PD. I am blown away by it, I found the learning curve to be almost non existent aside from the clock and voltage settings.

5. Yes, PSOC 1 topped out at $10. PSOC 3/5 you are talking in the $20-$30 range. I do not have an issue with the price if it is really a system on chip, it was a real SOC in 2005, but now I want ethernet on everything. I blame apple for not supporting BT serial and not putting in USB host on their iphone and ipad, the only way to provide a consistent experience across all devices is through TCPIP. So now I have to make a choice between; $10 top of the line M3/PIC32 + external analog parts vs $15 for a middle of the road PSOC 3 + external ethernet solution. Generally it works out to be much cheaper and going with a M3 or PIC32 and try to only add as much analog parts as needed.

6. Documentation was ok for me, I have no complaints

I tip my hat off to cypress, they did a great technical achievement with PSOC 3/5 as a geek their stuff gives me a hardon, they are building porches and selling it at BMW prices, but I can only afford a Toyota.

The problem with PSOC1 was the turtle core, no options for high speed ADC, no OCD, no EEPROM, small flash space made worse by memory hungry user modules. I was looking forward to PSOC 3/5 being PSOC1 but with those problems addressed and similar pricing.

PSOC 3/5 has it's uses and in the right application it is absolutely incredible, but with the current pricing the right application are high end applications and that makes it an even more niche product than PSOC 1 was.
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Re: PSoC series 3 and 5: disappointment

Postby kmmankad on Sun Jul 08, 2012 9:32 am

I strongly feel that PSoC3/5 can become arduino killers,but for certain reasons they are just super niche,kind of obscure products with small developer bases(compared to the mass movement that is Arduino,PIC,AVR)
I feel the major reason is pricing and packages,followed by development boards.

1.Packages : A development board is fine,but what when I want to install it into a small altoids tin,and put it above my garage door? QFN,TQFP and SSOP,really? Atleast one SOIC or DIP please,that I can use on a protoboard.Not everyone can get a double layered PCB fabricated without a lot of cost and headache.

2.Pricing : This has been elaborated enough in this thread.There definitely needs to be some rethinking on Cypress' part here.

3.Development boards: They are just too costly and large! And that starter kit? Impractical to use. Why cant we have a simple bare-bones board that retails for $20-30? Have these people learnt nothing from the success of the Arduino? It is only through this route that you can rope in the academic community and more,which is important if you want to increase penetration of your hardware,since students today are going to be engineers tomorrow.
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