SPI Transmission

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SPI Transmission

Postby mneber » Tue Feb 12, 2013 12:54 am

Hello,

I couldn't find anything here, that answers my question.
Maybe because it's another simple operation ;)

I need to transfer 32bit and recieve 32bit via SPI in one transmission (MSB first)
With the SPIM_PutArray(const uint16 buffer[2], uint8 2) I put the 4Bytes into the write buffer.
I've set the Tx and Rx Buffer Size to 4.

Is the write buffer equal to the FIFO? It only receives while transmitting data? (SPI MISO MOSI at the same time)
How do I tell the SPI to send? Or when does the SPI transmits the data to the slave? Every time the bus is free?

The master should ask for the converted value of an ADC (extern). During the transmission the ADC converts a new value and safes it to its register.
After the received value is handled in PSoC5, I want to decide if I need a new value or not.
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Re: SPI Transmission

Postby danadak » Tue Feb 12, 2013 4:19 am

The FIFO is 4 bytes or 4 words.

The Tx, Rx buffers are circular buffers up to 255 bytes.

If you right click the SPI component on the schematic, "find example projects",
you can open a new workspace with the example project, or add it to your
existing project. There is an example project for SPI DelSig.

Regards, Dana.
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Re: SPI Transmission

Postby mneber » Tue Feb 12, 2013 5:05 am

Thanks, but I've already found that example. It didn't help me.
I can't imagine whats going on with this functions like SPIM_ReadRxData / SPIM_WriteTxData.
This functions only access a buffer. I need to know what exactly happens with the bits in this buffers.
Also it is important to get 32bit from the slave during ONE transmission. The ChipSelect must stay LOW until I've received all 32bit, otherwise the ADC starts a new conversion and the value I demanded is lost.
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Re: SPI Transmission

Postby Dagodevas » Tue Feb 12, 2013 7:49 am

Usually the way reading from an SPI slave works is that you issue a read command (usually including an address of the data you want to read) and then you transmit "dumby" bytes equal to the number of bytes the slave is going to send. The slave can only send data when the master toggles the clock signal and to do that, the master is going to "send" a meaningless byte (usually all 0's or all 1's). Every time the master toggles the clock signal, it shifts the MISO value into the RX buffer. Usually, you don't worry about it because you know that you are just sending data and not receiving anything meaningful. After sending the dumby bytes, then you would read your RX buffer to see what the slave sent you.
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Re: SPI Transmission

Postby slandrum » Tue Feb 12, 2013 9:01 am

To be completely clear, during SPI activity, it ALWAYS transmits and receives at the same time, driven by the master's clocking.

The typical flow for the SPI Master is:

1) Send command byte(s)
2) Read and discard dummy byte(s) returned

Then to read back any response from the slave:

3) Send dummy byte(s)
4) Read response bytes(s) returned
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Re: SPI Transmission

Postby mneber » Tue Feb 12, 2013 10:26 am

Thanks guys.
I've already "implemented" the dummybytes - nice, that this is the right way.
But how can I keep the transmission alive to send 32bits? The 16bit/word is selected. That means after 16 CLK periods the transmission is done?
Or is it like all data in FIFO respectively Tx Buffer is sent at once? Like I wrote:
mneber wrote:I've set the Tx and Rx Buffer Size to 4.

That would mean every transmission is automatically 4 Bytes?

Last important thing:
Every time the SPIM_WriteTxBuffer(...) or SPIM_PutArray(...) is called, a transmission starts - and ONLY after this call?
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Re: SPI Transmission

Postby Dagodevas » Tue Feb 12, 2013 11:01 am

What you may end of having to do is control the SS signal manually so that it doesn't cycle after each word is transmitted. The write functions are what initiate the transmission. The size of your TX buffer really has no effect on the signals sent to the slave, but rather have more to do with how the transmission is handled internally. For example, if you have the TX buffer set to 4 bytes (just using 4-byte FIFO) and you tell it to transmit more than that, the write function you call will transfer the first 4 bytes to the FIFO and begin transmitting. Then it will block until the first byte has been sent from the FIFO (leaving an open byte) and it will then copy the last byte into the FIFO and return. If you were to set your TX buffer to more than 4 bytes, it would use an interrupt either on the "FIFO not full" or the "FIFO empty" status bit (I don't remember off the top of my head which one it usually uses) to continue loading the FIFO from a RAM buffer instead of blocking.

I hope that was actually helpful to you.
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Re: SPI Transmission

Postby mneber » Tue Feb 12, 2013 11:36 pm

Thank you for the good explanation!
Especially :
Dagodevas wrote: The write functions are what initiate the transmission. The size of your TX buffer really has no effect on the signals sent to the slave, but rather have more to do with how the transmission is handled internally.


I found this in the SPIM.c :
Code: Select all
/*******************************************************************************
* Function Name: SPIM_ADC_WriteTxData
********************************************************************************
*
* Summary:
*  Write a byte of data to be sent across the SPI.
*
* Parameters:
*  txDataByte: The data value to send across the SPI.
*
* Return:
*  None.
*
* Global variables:
*  SPIM_ADC_txBufferWrite - used for the account of the bytes which
*  have been written down in the TX software buffer, modified every function
*  call if TX Software Buffer is used.
*  SPIM_ADC_txBufferRead - used for the account of the bytes which
*  have been read from the TX software buffer.
*  SPIM_ADC_txBuffer[SPIM_ADC_TX_BUFFER_SIZE] - used to store
*  data to sending, modified every function call if TX Software Buffer is used.
*
* Theory:
*  Allows the user to transmit any byte of data in a single transfer.
*
* Side Effects:
*  If this function is called again before the previous byte is finished then
*  the next byte will be appended to the transfer with no time between
*  the byte transfers. Clear Tx status register of the component.
*
* Reentrant:
*  No.
*
*******************************************************************************/


"* Side Effects:
* If this function is called again before the previous byte is finished then
* the next byte will be appended to the transfer with no time between
* the byte transfers. Clear Tx status register of the component."
--> This may be what I'm looking for!
The call of SPIM_WriteTxData(...) in a do-while-loop until the FIFO is not full? Or does this only work with interrupts?
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Re: SPI Transmission

Postby Dagodevas » Wed Feb 13, 2013 7:53 am

It does appear from the Functional Description section of the SPIM datasheet that if you keep the bytes flowing out without a delay between, that the SS signal will stay active and will not toggle between the bytes. The WriteTxData function is the lowest level write function. It will load a single byte into the tx buffer. If your tx buffer is set to 4 bytes, and the tx FIFO is full (FIFO Not Full status bit = 0), it will block until there is space in the FIFO to load the byte (FIFO Not Full status bit = 1). Therefore, there would be no reason to worry about the FIFO status when using the WriteTxData function. If you look at the PutArray function, it simply calls the WriteTxData function in a loop just like you would if you are sending multiple bytes. It looks like either way would probably accomplish what you are trying to do. As long as you don't let the SPI run out of bytes to send, it will continue to hold the SS signal low.
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Re: SPI Transmission

Postby mneber » Tue Mar 26, 2013 2:01 am

I just wanted to thank you.
It works fine! You all helped a lot.
If you get it, it is really simple ;)
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