Problem with the PSOC core?

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Problem with the PSOC core?

Postby BrockLanders on Wed Mar 08, 2006 10:28 am

I stumbled across a problem that appears to be a problem with the PSoC's core. I'm using the 29466 on the eval board w/the LCD display (great debugging tool) to program the PSoC and run at full speed.

Here's the relevant source from the listing:

Code: Select all
FILE: .\main.asm
(0068) area   bss(RAM,REL)  // inform assembler that variables follow
...<snip>
(0083) rx_buff:  blk 16  // Only room for 16 chars.

...<snip>

(0228) dbug:   // Dumps AX & halts.
(0229)  push   x
    091C: 10     PUSH  X
(0230)  push   a
    091D: 08     PUSH  A
(0231)  mov  A, 1   // bottom line
    091E: 50 01   MOV   A,1
(0232)  mov   X, 0   // column
    0920: 57 00    MOV   X,0
(0233)  call   LCD_1_Position   // Set LCD cursor position
    0922: 9F 7B    CALL  0x089F
(0234)  pop  a
    0924: 18       POP   A
(0235)  call LCD_1_PrHexByte
    0925: 9E 1A    CALL  0x0741
(0236)  pop  a
    0927: 18       POP   A
(0237)  call LCD_1_PrHexByte
    0928: 9E 17    CALL  0x0741
(0238) .spin:
(0239)  jmp .spin
    092A: 8F FF    JMP   0x092A

...<snip>

(0507) call  UART_1_bReadRxData   // Just read a '/' from the UART.
    0A41: 9A 39    CALL  0x047C
(0508)  mov x, 1
    0A43: 57 01    MOV   X,1
(0509)  mov [x + rx_buff], A
    0A45: 54 0F    MOV   [X+15],A
(0510)  mov x, [rx_buff + 1]
    0A47: 58 10    MOV   X,[16]
(0511)  jmp dbug
    0A49: 8E D2    JMP   0x091C


What's going on:

Program flow gets to line 507. When the UART is read a "/" char (2Fh) is received and ends up in the Acc. rx_buff is in RAM @ addr 15h. The Acc is stored into RAM @ 16h in line 509, but when an attempt is made to read it back (line 510), a zero is returned. The dbug routine displays (A:X) "2F00", proving the Acc contained 2Fh.

Can any of the fine people at Cypress explain what I'm missing or is there some other more serious problem with this micro's core?
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Postby steve on Wed Mar 08, 2006 10:50 am

Is paging enabled in your 29466 project?

If so, the problem might be related to paging registers. Depending on the paging mode, the indexed memory access at line 509 and the direct memory access at line 510 can get the high 3 bits of the 11 bit RAM address from different paging registers, and end up referring to different RAM pages.

The PSoC Designer documentation has info on paging registers in

Large Memory Model Programming
Migrating to the Large Memory model
Technical Reference Manual section 4 Ram Paging

Hope this helps,
Steve
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Postby BrockLanders on Wed Mar 08, 2006 11:14 am

Can you post links to those documents as I'm not sure where to find them.

Under the IDE's Project/Settings... (compiler tab) the "Enable Paging" checkbox IS selected w/(greyed out) "Page 7" for the Stack page and a Stack page offset of "00". If I uncheck the "Enable Paging" checkbox I get 2 assembler warnings, one that says 'UART_1_RAM' not defined in startup file (boot.o).

While I'm sure the docs you mentioned deal with pro's and con's of paging, can you provide the nutshell version of why one would want to either use or avoid paging? It appears if I use the UART libraries I'm forced to enabling paging.

I ran the program with paging disabled (ignoring the 2 assembler errors) and now the dbug outputs "2F2F", which is the correct result, but what other built-in libraries are going to freak out?

Thanks for your help.
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Postby steve on Wed Mar 08, 2006 12:26 pm

You can find the documents in the PSoC Designer help menu under "Documentation ...".

Paging allows code to access multiple 256 byte pages (on multi-page parts), so if your project uses more than 256 bytes of RAM in total it's a must. The drawback is that extra code is necessary to deal with the paging registers. In C, paging code is generated by the compiler and just reduces code density. In assembler, it means you have to understand the paging register conventions and write code to handle paging registers yourself.

If you're writing assembly code for a multi-page part like the 29466 it's probably better to enable paging. Paging gives you access to more RAM and the 29446 has 32K of program space so the extra paging code shouldn't cost that much. It's a lot easier to use paging from the beginning of a project that it is to add it in the middle.

Regards,
Steve
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Postby wrightpc on Wed Mar 08, 2006 12:28 pm

You would want to use paging if you want more that 256 bytes for RAM *and* STACK combined. If not, then turn it off!

See other thread:

http://www.psocdeveloper.com/forums/viewtopic.php?t=1736

Also search for AN2218 on Cypress.com which explains about the paging.

Paul. :)
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Postby BrockLanders on Wed Mar 08, 2006 12:42 pm

Thanks for the help. I'll review the docs soon.

While I need lots of ROM space for code, my RAM needs are not too bad so I can probably do without the paging for this current project.

However, when I turn off the paging I get these 2 warnings:
UART_1_RAM not defined in boot.o
myproj_RAM not defined in boot.o

How do I make those errors go away?
Or perhaps I can safely ignore them?
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Postby wes on Wed Mar 08, 2006 12:47 pm

The warning messages are related to paging. The user module code works with paging enabled and disabled.

The release notes of service packs 2 and 3 have this note in the Known Issues section:
C compiler generates extraneous warning message relating to RAM AREAS

In projects that make use of RAM AREAs that are not explicitly defined in the boot.asm, the
linker may generate the warning message “warning: area 'AreaName’ not defined in startup
file './obj/boot.o' and does not have an link time address.” This warning message can be
safely ignored.
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Postby BrockLanders on Wed Mar 08, 2006 1:50 pm

Thanks for the help. Since I'll be handing this off to someone else it'd be nice to find a way to suppress those warnings.

I can't wait for SP4... :D
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Postby graaja on Wed Mar 08, 2006 5:37 pm

Open the boot.tpl. In the end, you will see many areas defined in RAM. Add the following lines below the already existing RAM area declarations, just above the AREA bss declaration. Then save the boot.tpl file and generate application.

AREA UART_1_RAM (RAM,REL,CON)
AREA myproj_RAM (RAM, REL, CON)
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Postby BrockLanders on Tue Mar 14, 2006 9:12 am

Thanks! That worked perfectly. For others with this same issue, click the "Generate Application" button, then click the "Build" button.
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